NBTI (Negative Bias Temperature Instability)

Definition: NBTI is a reliability issue that affects PMOS transistors under negative gate bias and high temperature stress. It causes an increase in the threshold voltage and a decrease in the drain current over time.

Key Characteristics:

  • Affects only PMOS transistors
  • Accelerated by negative gate bias and high temperature
  • Causes an increase in threshold voltage and a decrease in drain current
  • Can be partially recovered during device operation (recovery effect)
  • Becomes more critical with technology scaling and increased operating temperatures

Physical Mechanism:

  • Attributed to the generation of interface traps and oxide charges at the Si-SiO2 interface
  • Negative gate bias and high temperature lead to the dissociation of Si-H bonds and the diffusion of hydrogen species
  • Generated interface traps and oxide charges cause a shift in the threshold voltage and a reduction in carrier mobility

Impact on Device Performance:

  • Increased threshold voltage leads to reduced drive current and slower switching speed
  • Decreased drain current results in performance degradation and potential timing violations
  • Can cause long-term reliability issues and limit the lifetime of PMOS transistors

Mitigation Techniques:

  • Process optimization: Improving the quality of the Si-SiO2 interface and reducing the number of defects
  • Device design: Using high-k dielectrics, metal gates, and nitrided oxides to reduce NBTI effects
  • Circuit design: Applying adaptive voltage scaling, body biasing, and guard-banding to compensate for NBTI-induced performance degradation
  • Recovery management: Exploiting the recovery effect by applying positive gate bias during idle periods to partially reverse NBTI degradation

NBTI is a significant reliability concern in modern VLSI designs, particularly as technology scales and operating conditions become more stringent. Understanding and mitigating NBTI is crucial for ensuring the long-term reliability and performance of PMOS transistors and circuits.